Free, focused calculators for SCADA, PLC runtime timing, Modbus RTU, EtherCAT, enclosure cooling, and 24VDC power-system sizing.
Get the engineering answer you need in seconds—no account, no spreadsheet, no guesswork.
Purpose-built utilities for engineers who need a quick sizing or sanity check during design, commissioning, runtime tuning, network planning, or product selection.
Estimate SCADA historian data volume and a practical SSD size.
Planning estimate uses 100 bytes per recorded tag change, then adds your selected headroom plus OS/application reserve. Real storage varies with historian schema, compression, deadband, indexing, and database overhead.
Estimate sealed-cabinet temperature rise and cooling required.
Uses ΔT ≈ P/(h×A) with h = 5.5 W/m²·K and an exposure factor applied to enclosure surface area. Fan airflow is a planning estimate. Solar gain, internal hot spots, filters, altitude, and certified enclosure data are not modeled.
Estimate polling-cycle time, refresh rate, and a practical response timeout.
Models a typical 8-byte read request and a response of 5 + 2×registers bytes. For ≤19,200 baud, t3.5 is 3.5 character times; above 19,200 baud, 1.75 ms is used. Device processing delay is entered separately.
Add common panel loads and size a practical DIN-rail power supply.
Sums entered DC loads and applies your design headroom. Recommended standard wattage is rounded up to a common DIN-rail size. Verify startup/inrush current, redundancy, ambient derating, NEC/UL requirements, and manufacturer curves separately.
Turn CODESYS task-monitoring values into utilization, timing margin, and jitter indicators.
Uses the task interval and observed CODESYS monitoring values you enter. Utilization is execution time ÷ task interval; peak-to-peak jitter is maximum jitter minus minimum jitter. The health message is a planning indicator only and does not certify real-time performance.
Estimate the communication and application timing budget for a target EtherCAT cycle.
First-pass model: frame time ≈ 5 µs overhead + 0.08 µs per process-data byte at 100 Mbit/s, plus your entered slave delay, cable propagation at about 0.005 µs/m, application execution, and jitter reserve. Actual masters, frame layouts, slave types, OS/runtime behavior, and minimum device cycle times can change the result.
Add common EtherCAT device groups and estimate total cyclic RxPDO and TxPDO data.
Groups devices for quick planning and treats the entered bytes as total cyclic RxPDO + TxPDO payload per device. The RxPDO percentage splits that payload directionally. Serialization shows payload-only wire time at 100 Mbit/s and excludes Ethernet/EtherCAT framing and slave propagation.
Check the basic relationship between the master cycle, Sync0 factor, shift, and slave minimum cycle.
Checks arithmetic consistency only: Sync0 cycle = master cycle × factor, the selected cycle is compared with the entered slave minimum, and shift is checked against the calculated Sync0 period. Always use the slave ESI/device documentation and the master vendor's DC guidance for final settings.
ControlsCalc is designed for Automation, SCADA, PLC, OT, and industrial-computing professionals who need a fast engineering estimate without opening a spreadsheet or creating an account.
These calculators are planning aids, not substitutes for manufacturer data, applicable codes, certified testing, or a professional engineering review.
Yes. The calculators are intended to be usable immediately without an account, login, or subscription.
No. In this version, calculations run in your browser and the site does not send calculator inputs to a server.
No. They are planning and sanity-check tools. Final designs should be verified against equipment datasheets, applicable standards, site conditions, and qualified engineering judgment.
It is a practical planning assumption for an uncompressed tag-change record. Actual historian storage depends on database implementation, compression, deadband, indexing, metadata, and logging behavior.
No. It estimates wire time plus the device-response delay you enter. Real systems can be slower because of gateway latency, retries, serial adapters, OS scheduling, and slave processing time.
It converts the task interval, execution-time, watchdog, and jitter values you enter into utilization and timing-margin indicators. It is intended for troubleshooting and planning, not as a real-time certification.
No. It estimates a first-pass timing budget from process-data size, slave/cable propagation, application execution, and jitter reserve. Real performance depends on the EtherCAT master, operating system/runtime, frame layout, slave characteristics, and device-specific minimum cycle times.
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